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Example Projects

This page provides a set of sample projects for use with SmartSim. They are provided as ".zip" archives containing component and project files, which must be extracted before use.

To open these projects, run SmartSim and use File - Open Project, and find the project file (ending in ".ssp").

These examples are intended primarily for demonstrating SmartSim's capabilities rather than teaching digital logic.

4 Bit Addition

This example shows how to perform binary addition using half-adders and full-adders.

Download MD5 Checksum
Zip Archive 0087c64d6fd4878d7dd1e4e090fb1b9e

Flipflop Collection

This is a collection of 1 bit memory storage components, known as flipflops. It demonstrates the SR NOR Latch, D Latch, Positive Edge Triggered D Flipflop, and Negative Edge Triggered JK Flipflop

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Zip Archive 02be885da3369611fdd10ac37dc0213a

8 Bit Divider

This is a division circuit I made early on in the development of SmartSim.

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Zip Archive d4f22e31ca4acce0b834302f4b5176cb

8 Bit Division Using Finite State Machine.

This is another divider, but it uses a slightly different approach utilising a finite state machine.

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Zip Archive 9c8517ffd1fb4153953a557a61fb8d0c

16 Bit One Instruction Set Computer (OISC)

This is a minimalistic turing complete processor, which only performs one instruction, and thus does not require an opcode. It is a Subtract and Branch if Negative (SBN) processor, which means that it subtracts two numbers and jumps to an instruction if the result is negative. Also included are two programs for the processor: count in 11s, and generate Fibonacci numbers. These programs are selectable by adjusting the memory chip in the circuit and finding a ".bin" file.

To learn more about one instruction set computers, visit the OISC Wikipedia article.

Download MD5 Checksum
Zip Archive 51ae0a76939a2013338ea51f87a2fc66

Copying

All these circuits are released to the public domain, meaning you can freely edit and distribute these files.